FPGA computing systems: A Bird’s Eye View on Reconfigurable Computing (Marco D. Santambrogio)

Hi, I do really hope all is great with you! I’m Marco Santambrogio,
Associate Professor at Politecnico di Milano and today we are going to start
together a terrific journey, or if you’d prefer an introductory journey
to FPGA-based system design. Technology progress induces
paradigm shifts in computing. The invention of the programmable
microprocessor in 1974 has resulted in the evolution
from the pure hardware-based computing to the software-based computing. Today we are also entering in a new era. An era in which computing systems are no longer seen as monolithic, high performing,
power angry, single core systems, an era in which reconfigurable device,
such as FPGAs make it possible to have custom-designed
high-density hardware in an electronic circuit, with the added bonus of having the possibility
of changing it whenever there is the need, even while the whole application is still running. The flexibility of having custom,
adaptable hardware in an application is the factor that has determined the popularity
of FPGA devices in a broad range of fields. Configuring an FPGA means changing
its functionality to support a new application, and it is equal to having some new piece of hardware,
mapped on the FPGA chip, having to implement a new functionality. As we all know, the free food was yesterday, and the versatility and reprogrammability
of Field Programmable Gate Arrays comes at a price. Only a few years ago, the algorithms that could be implemented
in a single FPGA chip were fairly small. More recently, though, FPGAs
have reached a size where it is possible to implement more than reasonable portions
of an application in a single FPGA… Well, not only portion but, in some cases,
the entire application itself. Moreover, nowadays we can find FPGAs in the cloud,
like in the Amazon F1 instances and this is exactly the kind of system
we are going to target during our classes! A further improvement in FPGA technology allows modern boards to reconfigure
only some of the logic gates, leaving the other ones unchanged. This partial reconfiguration is of course much faster in case only a small part
of the FPGA logic needs to be changed. When both these features are available, the FPGA is referred to be
partially dynamically reconfigurable. This is a short overview on the topics we are going
to discuss and present during this course. I do really hope we’ll have the chance
to go through them together!

Leave a Reply

Your email address will not be published. Required fields are marked *